Field of the Invention
The present invention relates to a physical design of integrated circuits, and in particular to a physical design of 2.5-dimensional (2.5D) and/or three-dimensional (3D) integrated circuits.
Description of the Related Art
A 2.5-dimensional integrated circuit (2.5D IC) is a package with an active electronic component (e.g. a die or a chip) stacked on an interposer through conductive bumps. A three-dimensional integrated circuit (3D IC) is a package with a plurality of active electronic components stacked vertically through the use of through-silicon vias (TSVs) to form a single integrated circuit. The stacked die may be then packaged such that I/Os can provide connection to the 3D IC.
A 2.5D IC and/or 3D IC provides a solution for multi-functional, highest-margin, highest-volume designs with faster speeds. However, a 2.5D IC and/or 3D IC also faces challenges including complex designs of each active electronic component. Also, the integration of the stacked active electronic components or the integration of the active electronic component and the interposer generates design challenges. Conventional solutions implement the active electronic components (e.g. dies or chips), the interposer, and the TSVs separately. An assembly of the active electronic components, interposer, and TSVs is then fabricated to do physical verifications. In the interposer, however, the huge amount of digital, analog, and DDR connections makes it so that routings cannot be completed as automatic chip-level routings or manual substrate routings. Mismatched in the resulting 2.5D IC and/or 3D IC designs may occur, especially in the physical connections and the electrical connections between the active electronic component and the interposer.
Thus, a novel physical design of 2.5D IC and/or 3D IC is desirable.